The Russian R&D company IntegrIT, which has been operating in the telecommunications market for more than 7 years, announced the development of mathematical digital signal processing packages (DSP libraries) for the state-of-the-art computing cores of Cadence Tensilica family BBE (Base Band Engine).

The company is also widely known as a provider of ready—made software solutions for the telecommunications market - engines for audio and video transmission over IP networks (VVoIP) for Windows, Mac OS, Linux computers, as well as Android and iOS smartphones.
The widespread use of modern wireless data transmission standards, the growth of information transmission speeds and increased requirements for the use of the radio frequency spectrum dictate new approaches to the design of hardware for telecommunications devices.
In fact, we are witnessing a new revolutionary stage in device design, comparable to the transition from discrete components to integrated circuits. Only now, much larger blocks, the so-called IP cores, act as “transistors”. These can be a wide variety of components, such as hardware interface controllers or processor cores. More recently, the role of such cores was limited mainly to the control functions of the remaining blocks, and signal processing was done either on separate FPGAs or required the development of specialized VHDL code. With the advent of Tensilica cores with a performance of up to 40 billion 16-bit multiplications per second, this situation has changed radically. The cores of the BBE family (Base Band Engine) are designed to perform the most time-consuming calculations that occur when processing radio signals in GSM, WCDMA, LTE networks when transmitting voice and video streams, as well as when transmitting data at 3G/4G speeds. VLSI developers can now get an ultra-productive core that occupies a minimum area on a chip by programming it in the familiar C language.
About a year ago, Tensilica was absorbed by the market leader in VLSI design tools – Cadence – and, thus, significantly expanded the reach of consumers. It produces several core lines: D2, HiFi2/HiFi3, VectraLX, BBE16, BBE32UE, BBE32EP, BBE64EP and others. Unprecedented performance, minimal on-chip area and minimal power consumption make these cores extremely popular, they are already licensed by hundreds of companies around the world, and the number of licensed cores has exceeded a trillion. IntegrIT has been working with Tensilica/Cadence for the fifth year, providing cores with DSP libraries. Close cooperation between the companies makes it possible to fully utilize all the capabilities of the cores, including specialized accelerators. These DSP libraries are successfully used by companies such as HiSilicon, Huawei, LG, Samsung, Dialog and others. Now is the time to offer IntegrIT products to the domestic consumer as well.
IntegrIT offers ready-made DSP libraries for all Tensilica cores, as well as adapting them to specific requirements or developing highly optimized signal processing algorithms for them. The libraries include hundreds of modules designed to implement a digital transmission/reception path, including a variety of filters, FFT (including non-standard sizes, for example 1536), solvers of linear equation systems for MMSE equalizers and channel evaluators, MIMO SFD, soft QAM demappers, etc. The functions achieve peak core performance, for example, using libraries from IntegrIT, the BBE64EP core at a clock frequency of 600 MHz is capable of processing 13 million FFT-128 per second or 35 million complex 4x4 QR matrix decompositions! Thus, the IntegrIT libraries are an ideal choice for implementing wireless information transmission systems with speeds of tens of Mbit/sec. Interestingly, IntegrIT, on the one hand, provides libraries with a rich set of tests and provides a large test coverage, and on the other, allows users to run code not on the target kernel, but on ordinary computers running Linux or Windows without using a kernel simulator. This approach allows us to solve several serious problems faced by developers.
First, it should be noted that the complexity of signal processing algorithms for wireless systems, including MIMO, is quite high. Such systems must operate in a wide range of input influences, be resistant to interference, interference, fading. As a result, for validation, it is necessary to test as many algorithms as possible on simulation models in environments such as Simulink. In the case when a significant part of the software is written in VHDL, this is extremely difficult, which means that there is a risk that the algorithmics will not be tested to a sufficiently good extent already at the early stages of development. This can jeopardize the entire development, which has taken dozens of man-years. Using the C language and Integrit's DSP libraries, developers can easily validate signal processing software in familiar simulation environments – from Simulink and Matlab to Python and Fortran. At the same time, 100% identical execution is guaranteed when transferring code directly to the core on a chip.
Secondly, an important issue facing VLSI developers is energy consumption. In some cases, it can be a competitive advantage. The DSP libraries for Tensilica cores, on the one hand, using all the capabilities of specialized cores, achieve peak performance, and on the other, specify it in detail for typical cases. This makes it possible to predict important indicators such as clock frequency and crystal power dissipation at the early design stage.
Thirdly, time to market (for commercial products) and development time (for special purpose products) is one of the most important performance indicators. To reduce the development time of complex telecommunications products, it is vital to use large ready-made blocks in the same way as it happens in other sectors of the economy. Integrit's ready-made DSP libraries shorten the implementation time, increase the degree of integration and reduce engineering risks.
Fourth, do not forget about the import substitution program. It is no secret that signal processing processors capable of meeting the requirements of LTE and similar standards are not yet available in Russia. In fact, by licensing Tensilica cores, VLSI developers get their hands on ready-made solutions that they can insert like cubes into their products. This reduces the dependence on imports of ready-made FPGAs, DSP and other components for high-performance signal processing from foreign companies. IntegrIT operates under an import substitution program and can offer favorable terms of cooperation to Russian microelectronics manufacturers.
Over the years of working with Tensilica, IntegrIT employees have gained invaluable experience and expertise in developing digital signal processing algorithms for use in VLSI. The experience, expertise and professionalism of IntegrIT specialists guarantee high-quality and fast software development for Tensilica cores. IntegrIT's developments make it possible to link developers of digital data transmission standards and manufacturers of microprocessors into a single chain, since IntegrIT has practical experience in both fields. This market niche presents unique opportunities for creating high-tech solutions against the background of the overall global growth in the production of microelectronics products.
IntegrIT is optimistic about the future, as the course taken by the Russian state to localize the production of high-tech products fully fits into the company's strategy.